Tuesday, November 28 2017
12:00pm - 1:00pm
Marcus Nanotechnology Building 1117-1118 | 345 Ferst Drive | Atlanta GA | 30332
Free food
For more information:

David Gottfried: david.gottfreid@ien.gatech.edu

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Nano@Tech: Performance Modeling, Design, and Benchmarking for Beyond-CMOS Devices and Circuits

Performance Modeling, Design, and Benchmarking for Beyond-CMOS Devices and Circuits

Prof. Azad Naeemi
School of Electrical and Computer Engineering, Georgia Tech

Abstract: A diverse set of novel materials, physical phenomena, interconnects, logic and memory devices, and circuit/system concepts are being studied globally to sustain the exponential growth of the computational power of integrated circuits. As such, the search for beyond-CMOS devices and circuits must deal with all the levels of abstraction and must take a holistic approach to evaluate the potential performance of each possible option. In this talk, I will first present physical models for electronic and spintronic transport properties of various conventional and emerging materials such as graphene, Si and Cu. Then I will present compact physical models (SPICE models) for various physical phenomena such as nanomagnet dynamics, spin-orbit coupling and spin waves. The utilization of these models for device modeling will then be discussed and I will show how these models can be used to model the behavior of some of the proposed beyond-CMOS devices and to evaluate their potential performance once they are used in various representative Boolean and neuromorphic circuits. Through several examples, I will show how this process can be used to identify the main limiting factors for each device and to revise and refine them.


Bio: Azad Naeemi is a professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. He received the B.S. degree in electrical engineering from Sharif University, Tehran, Iran, in 1994, and the M.S. and Ph.D. degrees in electrical and computer engineering from Georgia Tech in 2001 and 2003, respectively. Professor Naeemi’s research focuses on modeling and design for emerging materials, devices, and interconnects, and he explores novel circuit architectures to exploit emerging devices to their full potentials. As such, his research crosses many levels of abstraction and covers a diverse set of electronic, magnetic/spintronic, ferroelectric, and multiferroic components and circuits. He is also interested in technology/architecture co-optimization for both CMOS-based von Neumann and beyond-CMOS non-Boolean computational systems. He serves as the leader of the beyond-CMOS benchmarking research at the Semiconductor Research Corporation (SRC) Nanoelectronics Research Initiative (NRI) and the Semiconductor Technology Advanced Research Network (STARnet). He has received an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards at international conferences. Professor Naeemi is also the recipient of the 2014 Richard M. Bass/Eta Kappa Nu Outstanding Teacher Award selected by the vote of the ECE senior class and the 2014 ECE Outstanding Junior Faculty Member Award.